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Digital Computer Electronics - Section 1 Multiple Questions and Answers.
| 6. | What is the minimum number of two-input NAND gates used to perform the function of two input OR gate ? | ||
| A. | one | ||
| B. | two | ||
| C. | three | ||
| D. | four | ||
| 7. | Odd parity of word can be conveniently tested by: | ||
| A. | OR gate | ||
| B. | AND gate | ||
| C. | NOR gate | ||
| D. | XOR gate | ||
| 8. | Which one of the following will give the sum of full adders as output ? | ||
| A. | Three point majority circuit | ||
| B. | Three bit parity checker | ||
| C. | Three bit comparator | ||
| D. | Three bit counter | ||
| 9. | The number of full and half-adders required to add 16-bit numbers is: | ||
| A. | 8 half-adders, 8 full-adders | ||
| B. | 1 half-adder, 15 full-adders | ||
| C. | 16 half-adders, 0 full-adders | ||
| D. | 4 half-adders, 12 full-adders | ||
| 10. | The time required for a pulse to decrease from 90 to 10 per cent of its maximum value is called: | ||
| A. | Rise time | ||
| B. | Decay time | ||
| C. | Binary level transition period | ||
| D. | Propagation delay | ||
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